onsemi (Ansemi)
画像はイメージの場合もございます。
商品詳細は仕様をご覧ください。
MC100EP29DTR2G
ECL Dual Differential Clock/Data D-Type Flip-Flop with Set and Reset
カテゴリー
Logic Devices > Flip Flops
メーカー/ブランド
onsemi (Ansemi)
説明
The MC10/100EP29 is a dual master-slave flip-flop. The device provides fully differential data and clock inputs and outputs. The MC10/100EP29 is functionally identical to the MC10/100EL29. Data enters the master latch when the clock is low and is transferred to the slave latch when the clock input is transitioning. The differential input employs special circuitry to ensure device stability under open input conditions. With both differential inputs left open, the Dbar input will be pulled down to VEE and the Dbar input will be biased to VCC / 2. The output will go to the specified state, but the state is random based on how the trigger is fired. Both flip-flops provide asynchronous override "set" and "reset" inputs. Note that the set and reset inputs cannot be high at the same time. The VBB pin (internal generated power supply) is only available for this device. For the single-ended input case, connect the unused differential input to VBB as the switch reference voltage. VBB can also re-bias AC-coupled inputs. When used, decouple VBB and VCC with 0.01uF capacitors and limit current source or sink to 0.5 mA. VBB should be left open when not in use. The 100 series includes temperature compensation.
リクエスト引用
必須フィールドをすべて入力し、
送信をクリックしてください。12 時間以内に電子メールでご連絡いたします。何か問題がございましたら、メッセージを残すか、
[email protected] まで電子メールを送信してください。 できるだけ早く対応させていただきます。
在庫あり 61997 PCS